RaninduH commited on
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1 Parent(s): 6816fa1

compile cache model card update

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  1. compile_cache_model_card.md +2 -2
compile_cache_model_card.md CHANGED
@@ -1,6 +1,6 @@
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  # Compile Cache — MI300X
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- Generated: 2026-07-09T09:43:54Z
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  ## Purpose
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  Records the exact configuration under which the compile cache (inductor + Triton) was built.
@@ -18,7 +18,7 @@ against these values to pinpoint the cache-key mismatch.
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  | Torch | 2.11.0+rocm7.2 |
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  | HIP / ROCm | 7.2.26015 |
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  | Triton | 3.7.0 |
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- | ck4inductor | <function __version__ at 0x7bc5fdb8f6a0> |
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  | Python | 3.11.15 |
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  ## Compile Configuration
 
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  # Compile Cache — MI300X
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+ Generated: 2026-07-09T11:24:19Z
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  ## Purpose
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  Records the exact configuration under which the compile cache (inductor + Triton) was built.
 
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  | Torch | 2.11.0+rocm7.2 |
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  | HIP / ROCm | 7.2.26015 |
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  | Triton | 3.7.0 |
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+ | ck4inductor | <function __version__ at 0x755a897e7600> |
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  | Python | 3.11.15 |
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  ## Compile Configuration